Ну так всё в порядке - оно там есть, а работать никто не обещал, тем более что определения этого самого "работать" производитель не приводит.

С этими "умными переключениями" вообще часто такое веселье, вот похожая история была в Одессе в 1912 году - "The Exynos 5410 saw limited use, appearing in some international versions of the Galaxy S 4 and nothing else. Part of the problem with the design was a broken implementation of the CCI-400 coherent bus interface that connect the two CPU islands to the rest of the SoC. In the case of the 5410, the bus was functional but coherency was broken and manually disabled on the Galaxy S 4. The implications are serious from a power consumption (and performance) standpoint. With all caches being flushed out to main memory upon a switch between CPU islands. Neither ARM nor Samsung LSI will talk about the bug publicly, and Samsung didn't fess up to the problem at first either - leaving end users to discover it on their own."